1. High Voltage Arcing Protection: When testing high voltages on a wafer, discharges (arcing) may occur between probes and also between the device under test (DUT) and neighboring devices or between other test pads. In addition, at voltages higher than 1000 V, arcing discharges may occur between the wafer carrier pad and the surrounding probe pads.
2. Low contact resistance: Another key challenge in achieving accurate high-current measurements is minimizing the contact resistance between the probe and the device.wafer tester This ensures that the complete performance of the device is measured on the wafer and is identical to the packaged device performance. This helps to reduce cost and improve the performance of the end-application power module.
3. Uniform Contact and Thermal Resistance: In order to obtain accurate data for each device on the wafer, there needs to be uniform physical contact between the backside of the wafer and the top surface of the chuck.wafer probe testing First, this disperses thermal errors by ensuring that all heat generated from the devices is directed away from each device, regardless of the location of the device on the wafer. Second, for vertical devices where the chuck acts as one of the electrical contacts (e.g., IGBTs), this enables ultra-low contact resistance, which is a critical requirement for overcoming resistance errors in RDS(on) non-Kelvin tests. Only when these two challenges are addressed can the maximum performance of each device be seen in the test data.
4. Accurate Device Models: Product characterization engineers are challenged to simultaneously meet the ability to measure high voltage/current and accurate low leakage performance to create complete device models. This will help circuit designers optimize their power IC designs for maximum business value.vibration isolation table Balancing high voltage/current switching with device power consumption when not in operation (disconnected state) is the focus of this work.
Related Hot Topic
What comprises the procedure for wafer testing?
The process of wafer sorting, also referred to as wafer testing, constitutes an integral segment within the comprehensive examination of silicon wafers. This particular test involves conducting a straightforward electrical assessment on individual silicon dice, while they remain in their wafer configuration. The primary objective of wafer sorting is to meticulously discern non-operational dice, thereby preemptively preventing the incorporation of such dice into finished packaging units.
Are bodily vibrations harmless?
Despite the potential short-term health advantages attributed to whole-body vibration, a consensus among professionals underscores its potential for detrimental consequences over an extended period. Currently, there is a scarcity of comprehensive research, necessitating further studies to gain a comprehensive understanding of the bodily impacts of such vibrations.
What does the term "probe" signify in the context of Non-Destructive Testing (NDT)?
In the realm of ultrasonic nondestructive testing (NDT), probes occupy a pivotal role, serving as the cornerstone of the inspection process. They are responsible for emitting high-frequency acoustic waves, which subsequently facilitate the creation of surface maps. Leveraging these maps, technicians can meticulously examine for signs of corrosion and pinpoint any imperfections or flaws present.